Samsung S3C6400X User Manual page 6

S3C6400
RISC MICROPROCESSOR
1.1.1 S3C6400X RISC Microprocessor Features Summary
The features of S3C6400X RISC Microprocessor include:
The ARM1176JZF-S based CPU subsystem with Java acceleration engine and 16KB/16KB I/D
Cache and 16KB/16KB I/D TCM.
400Mhz Operating Frequency at 1.0 V , 533Mhz at 1.1V and 667Mhz at TBD V respectively.
One 8-bit ITU 601/656 Camera interface up to 4M pixel for scaled and 16M pixel for unscaled
resolution.
Multi Standard Codec provides encoding and decoding of MPEG-4/H.263/H.264 up to 30fps@SD
and decoding of VC1 video up to 30fps@SD.
2D Graphics Acceleration with BitBlit and Rotation.
AC-97 audio codec interface and PCM serial audio interface.
1/2/4bpp Palletized or 16bpp/24bpp Non-Palletized Color-TFT support up to 1024x1024.
I2S and I2C interface support.
Dedicated IrDA port for FIR, MIR and SIR.
Flexibly configurable GPIOs.
port USB 2.0 OTG supporting high speed (480Mbps, on-chip transceiver).
port USB 1.1 Host supporting full speed (12Mbps, on-chip transceiver).
High Speed MMC/SD card support.
Real time clock, PLL, timer with PWM and watch dog timer.
32 channel DMA controller.
Support 8x8 key matrix.
Advanced power management for mobile applications.
Memory Subsystem
SRAM/ROM/NOR Flash Interface with x8 or x16 data bus.
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Muxed OneNAND Interface with x16 data bus.
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NAND Flash Interface with x8 data bus.
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SDRAM Interface with x16 or x32 data bus.
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Mobile SDRAM Interface with x16 or x32 data bus (133Mbps/pin rate).
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Mobile DDR Interface with x16 or x32 data bus (266Mbps/pin DDR).
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Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
PRODUCT OVERVIEW
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