A/D Control Register (Adcr) - Renesas H8SX/1520 Series Hardware Manual

32-bit cisc microcomputer
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15.3.3

A/D Control Register (ADCR)

ADCR enables A/D conversion to be started by an external trigger input.
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
7
TRGS1
6
TRGS0
5
SCANE
4
SCANS
3
CKS1
2
CKS0
1, 0
[Legend]
X: Don't care
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7
6
TRGS1
TRGS0
SCANE
0
0
R/W
R/W
Initial
Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
All 0
R
5
4
SCANS
CKS1
0
0
R/W
R/W
R/W
Description
Timer Trigger Select 1 and 0
These bits select enabling or disabling of the start of A/D
conversion by a trigger signal.
00: A/D conversion start by external trigger is disabled
01: A/D conversion start by external trigger from TPU is
enabled
10: Setting prohibited
11: A/D conversion start by the ADTRG pin is enabled*
Scan Mode
These bits select the A/D conversion operating mode.
0X: Single mode
10: Scan mode. A/D conversion is performed
continuously for channels 1 to 4.
11: Scan mode. A/D conversion is performed
continuously for channels 1 to 8.
Clock Select 1 and 0
These bits set the A/D conversion time. Set bits CKS1
and CKS0 only while A/D conversion is stopped (ADST =
0).
00: A/D conversion time = 530 states (max)
01: A/D conversion time = 266 states (max)
10: A/D conversion time = 134 states (max)
11: A/D conversion time = 68 states (max)
Reserved
These are read-only bits and cannot be modified.
Section 15 A/D Converter
3
2
1
CKS0
0
0
0
R/W
R
Rev. 3.00 Mar. 14, 2006 Page 555 of 804
0
0
R
REJ09B0104-0300

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