Example Of Use; Figure 16.18 Sample Flowchart For Master Transmit Mode - Renesas HD6417641 Hardware Manual

2
Section 16 I C Bus Interface 2 (IIC2)
16.4.8

Example of Use

Flowcharts in respective modes that use the I
Read BBSY in ICCR2
No
Set MST and TRS
Write 1 to BBSY
Write transmit data
Read TEND in ICSR
No
Read ACKBR in ICIER
Write transmit data in ICDRT
Read TDRE in ICSR
No
No
Write transmit data in ICDRT
Read TEND in ICSR
No
Clear TEND in ICSR
Clear STOP in ICSR
Write 0 to BBSY
Read STOP in ICSR
No
Set MST to 1 and TRS
Clear TDRE in ICSR

Figure 16.18 Sample Flowchart for Master Transmit Mode

Rev. 4.00 Sep. 14, 2005 Page 502 of 982
REJ09B0023-0400
Start
Initialize
[1]
[2]
[1]
BBSY=0 ?
[3]
Yes
[4]
[2]
in ICCR1 to 1
[5]
[3]
and 0 to SCP
[6]
[4]
in ICDRT
[7]
[5]
[8]
TEND=1 ?
Yes [9]
[6] [10] Wait for last byte to be transmitted.
No
ACKBR=0 ?
[11] Clear the TEND flag.
Yes
No
Transmit
Mater receive mode
mode?
Yes
[12] Clear the STOP flag.
[7]
[13] Issue the stop condition.
[8]
[14] Wait for the creation of stop condition.
TDRE=1 ?
Yes
[15] Set slave receive mode. Clear TDRE.
Last byte?
[9]
Yes
[10]
TEND=1 ?
Yes
[11]
[12]
[13]
and SCP
[14]
STOP=1 ?
Yes
to 0 in ICCR1
[15]
End
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C bus interface are shown in figures 16.18 to 16.21.
Test the status of the SCL and SDA lines.
Set master transmit mode.
Issue the start candition.
Set the first byte (slave address + R/W) of transmit data.
Wait for 1 byte to be transmitted.
Test the acknowledge transferred from the specified slave device.
Set the second and subsequent bytes (except for the final byte) of transmit data.
Wait for ICDRT empty.
Set the last byte of transmit data.