ST STM32L4+ Series Reference Manual page 1436

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General-purpose timers (TIM15/TIM16/TIM17)

TIM15 option register 1 (TIM15_OR1)

Address offset: 0x50

Reset value: 0x0000

Bits 31:3 Reserved, must be kept at reset value.

Bits 2:1 ENCODER_MODE[1:0]: Encoder mode

00: No redirection

01:TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively

10:TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively

11:TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively

Bit 0 TI1_RMP: Input capture 1 remap

0: TIM15 input capture 1 is connected to I/O

1: TIM15 input capture 1 is connected to LSE

TIM15 option register 2 (TIM15_OR2)

Address offset: 0x60

Reset value: 0x0000 0001

Bits 31:12 Reserved, must be kept at reset value.

Bit 11 BKCMP2P: BRK COMP2 input polarity

This bit selects the COMP2 input sensitivity. It must be programmed together with the BKP

polarity bit.

0: COMP2 input is active low

1: COMP2 input is active high

Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits

Bit 10 BKCMP1P: BRK COMP1 input polarity

This bit selects the COMP1 input sensitivity. It must be programmed together with the BKP

polarity bit.

0: COMP1 input is active low

1: COMP1 input is active high

Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits

in TIMx_BDTR register).

RM0432 Rev 6

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