Cautions On Using Ir Encoder/Decoder; Figure 4-4. Irphy Ver. 1.4 Block Configuration Example; Table 4-4. Irphy Ver. 1.4 Sir Ratings Related To Data Transfer Speed And Pulse Width - Renesas EMMA Mobile 1 User Manual

4.6.4 Cautions on using IR encoder/decoder

(1) Cautions on changing the IR control register settings
Be sure to set bit 4 (IR_RXEN) of the IRCR0 register to 0 (to stop reception) before changing the register
settings that specify the reception by the IR decoder. If this bit is not set to 0, invalid data might be received
due to a sudden signal variation.
The following registers are affected:
Bit 6 (IR_MASK_OFF) and bit 5 (IR_RXPSEL) of IRCR0 register
IRCR1 to IRCR4 registers
(2) Restriction on the XIN clock frequency minimum
The IR decoder uses the XIN clock to sample reception pulses. Therefore, the minimum valid reception pulse
width depends on the XIN clock frequency.
(3) Supported IrDA specifications
The interface protocol prescribed by IrDA concerns the infrared (IR) interface, and the electrical interface (<1>
and <2> in Figure 4-4) is not prescribed. When using the IR encoder/decoder, thoroughly evaluate the
connectivity with the connected devices (such as IR transceivers).
16550-
compatible
UART

Table 4-4. IrPHY Ver. 1.4 SIR Ratings Related to Data Transfer Speed and Pulse Width

Transfer
Speed
(kbps)
2.4
9.6
19.2
38.4
57.6
115.2
Remark The pulse widths are defined for the IR output (<3> in Figure 4-4).
44
CHAPTER 4 DESCRIPTION OF FUNCTIONS

Figure 4-4. IrPHY Ver. 1.4 Block Configuration Example

IR encoder
Encoder/
<1>
decoder
IR decoder
Modulation Allowable
Mode Transfer Speed
Error (% of Rate)
 0.87
RZI
 0.87
RZI
 0.87
RZI
 0.87
RZI
 0.87
RZI
 0.87
RZI
User's Manual S19262EJ3V0UM
Output driver
and LED
IR transceiver
<2>
module
Detector and
receiver
Minimum Pulse Width
Pulse Width x3/16 Nominal
 
( s) Value ( s)
1.41 78.13
1.41 19.53
1.41 9.77
1.41 4.88
1.41 3.26
1.41 1.63
IR output
<3>
IR input
Maximum
Pulse Width

( s)
88.55
22.13
11.07
5.96
4.34
2.23