Timer Xy Control Register (Tcrxy); Table 10.4 Registers Accessible By Tmr_X/Tmr_Y - Renesas H8S/2111B Hardware Manual

Table 10.4 Registers Accessible by TMR_X/TMR_Y

TMRX/Y H'FFF0
0 TMR_X
TCR_X
1 TMR_Y
TCR_Y

10.3.11 Timer XY Control Register (TCRXY)

TCRXY selects the TMR_X and TMR_Y output pins and internal clock.
Bit Bit Name
7 IOSX
6 IOSY
5 CKSX
4 CKSY
3 to 0 —
Note: * The program development tool (emulator) does not support TCRXY.
Rev. 1.00, 05/04, page 204 of 544
H'FFF1 H'FFF2
TMR_X TMR_X
TCSR_X TICRR
TMR_Y TMR_Y
TCSR_Y TCORA_Y
Initial
Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
All 0 R/W
H'FFF3 H'FFF4
TMR_X TMR_X
TICRF TCNT
TMR_Y TMR_Y
TCORB_Y TCNT_Y
Description
TMR_X I/O Select
0: Output to P67/TMOX and input from P60/TMIX
1: Output to PF6/ExTMOX and input from PF4/ExTMIX
TMR_Y Output Enable
0: Output to PF7/TMOY is prohibited and input from
P62/TMIY
1: Output to PF7/TMOY is permitted and input from
PF5/ExTMIY
TMR_X Clock Select
For details about selection, see the clock conditions in
table 10.3.
TMR_Y Clock Select
For details about selection, see the clock conditions in
table 10.3.
Reserved
The initial value should not be changed.
H'FFF5 H'FFF6
TMR_X TMR_X
TCORC TCORA_X
TMR_Y
TISR
H'FFF7
TMR_X
TCORB_X