Start Condition, Stop Condition Generation Method; Fig. 2.8.9 Start Condition Generation Timing Diagram; Fig. 2.8.10 Stop Condition Generation Timing Diagram; Table 2.8.2 Start Condition/Stop Condition Generation Timing Table - Renesas 7200 Series User Manual

FUNCTIONAL DESCRIPTION
2.8 Multi-master I

2.8.3 START condition, STOP condition generation method

(1) START condition generation method
When the ESO bit of the I
2
the I C status register (address 00D9
will then be generated. After that, the bit counter becomes "000
The START condition generating timing and BB bit set timing are different in the standard clock mode
and the high-speed clock mode. Refer to "Figure 2.8.9" for the START condition generation timing
diagram, and "Table 2.8.2" for the START condition/STOP condition generation timing table.
(2) STOP condition generation method
When the ESO bit of the I
2
the I C status register (address 00D9
bit to "0". A STOP condition will then be generated. The STOP condition generation timing and the
BB flag reset timing are different in the standard clock mode and the high-speed clock mode. Refer
to "Figure 2.8.10" for the STOP condition generating timing diagram, and "Table 2.8.2" for the
START condition/STOP condition generation timing table.

Fig. 2.8.9 START condition generation timing diagram

Fig. 2.8.10 STOP condition generation timing diagram

Table 2.8.2 START condition/STOP condition generation timing table

Item
Setup time
Hold time
Set/reset time for BB flag
Note: Absolute time at f = 4 MHz. The value in parentheses denotes the number of f cycles.
2-58
2 C-BUS interface
2 C control register (address 00DA
16
2 C control register (address 00DA
2
I C status register
write signal
SCL
SDA
BB flag
2
I C status register
write signal
SCL
SDA
BB flag
Standard clock mode
5.0 µ s (20 cycles)
5.0 µ s (20 cycles)
3.0 µ s (12 cycles)
7220 Group User's Manual
) to set the MST, TRX and BB bits to "1." A START condition
) for setting the MST bit and the TRX bit to "1" and the BB
16
Setup
Hold time
time
Set time for
BB flag
Setup
time
Setup
Hold time
time
Reset time for
BB flag
) is "1," execute a write instruction to
16
" and an SCL for 1 byte is output.
2
) is "1," execute a write instruction to
16
High-speed clock mode
2.5 µ s (10 cycles)
2.5 µ s (10 cycles)
1.5 µ s (6 cycles)