Section 5 Interrupt Controller; Features - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer

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Table of Contents

• Two interrupt control modes

 Any of two interrupt control modes can be set by means of the INTM1 and INTM0 bits in

the system control register (SYSCR).

• Priorities settable with IPR

 An interrupt priority register (IPR) is provided for setting interrupt priorities. Eight priority

levels can be set for each module for all interrupts except NMI. NMI is assigned the

highest priority level of 8, and can be accepted at all times.

• Independent vector addresses

 All interrupt sources are assigned independent vector addresses, making it unnecessary for

the source to be identified in the interrupt handling routine.

• Seven external interrupts

 NMI is the highest-priority interrupt, and is accepted at all times. Rising edge or falling

edge can be selected for NMI. Falling edge, rising edge, or both edge detection, or level

sensing, can be selected for IRQ0 to IRQ5.

• DTC control

 The DTC can be activated by an interrupt request.

Note: No DTC is implemented in the H8S/2614 and H8S/2616.

Section 5 Interrupt Controller

Rev. 6.00 Mar 15, 2006 page 67 of 570

REJ09B0211-0600