A/D Control Register (Adcr) - Renesas H8SX/1650 Hardware Manual

Renesas 32-bit cisc microcomputer h8sx family / h8sx/1600 series
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14.3.3

A/D Control Register (ADCR)

ADCR enables A/D conversion to be started by an external trigger input.
Bit
7
Bit Name
TRGS1
Initial Value
0
R/W
R/W
Bit
Bit Name
7
TRGS1
6
TRGS0
5
SCANE
4
SCANS
3
CKS1
2
CKS0
6
5
TRGS0
SCANE
0
0
R/W
R/W
Initial
Value
R/W
Description
0
R/W
Timer Trigger Select 1 and 0
0
R/W
These bits select enabling or disabling of the start of A/D
conversion by a trigger signal.
00: A/D conversion start by external trigger is disabled
01: A/D conversion start by external trigger from TPU is
10: A/D conversion start by external trigger from TMR is
11: A/D conversion start by the ADTRG0 pin is enabled*
0
R/W
Scan Mode
0
R/W
These bits select the A/D conversion operating mode.
0X: Single mode
10: Scan mode. A/D conversion is performed
11: Scan mode. A/D conversion is performed
0
R/W
Clock Select 1 and 0
0
R/W
These bits set the A/D conversion time. Set bits CKS1
and CKS0 only while A/D conversion is stopped (ADST =
0).
00: A/D conversion time = 530 states (max)
01: A/D conversion time = 266 states (max)
10: A/D conversion time = 134 states (max)
11: A/D conversion time = 68 states (max)
4
3
SCANS
CKS1
0
0
R/W
R/W
enabled
enabled
continuously for channels 1 to 4.
continuously for channels 1 to 8.
Rev.2.00 Jun. 28, 2007 Page 531 of 666
Section 14 A/D Converter
2
1
CKS0
0
0
R/W
R
REJ09B0311-0200
0
0
R

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