Renesas H8SX/1650 Hardware Manual page 397

Renesas 32-bit cisc microcomputer h8sx family / h8sx/1600 series
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(4)
Timing for Counter Clearing by Compare Match/Input Capture
Figure 9.34 shows the timing when counter clearing by compare match occurrence is specified,
and figure 9.35 shows the timing when counter clearing by input capture occurrence is specified.
P
Compare match
signal
Counter clear
signal
TCNT
TGR
Figure 9.34 Counter Clear Timing (Compare Match)
P
Input capture
signal
Counter clear
signal
TCNT
TGR
N
N
N
Figure 9.35 Counter Clear Timing (Input Capture)
Section 9 16-Bit Timer Pulse Unit (TPU)
H'0000
H'0000
N
Rev.2.00 Jun. 28, 2007 Page 375 of 666
REJ09B0311-0200

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