Section 17 Clock Pulse Generator
External
clock
Iφ
Bus master
17.5.2
Notes on Resonator
Since various characteristics related to the resonator are closely linked to the user's board design,
thorough evaluation is necessary on the user's part, using the resonator connection examples
shown in this section as a reference. As the circuit parameters for the resonator will depend on the
floating capacitance of the resonator and the mounting circuit, the parameters should be
determined in consultation with the resonator manufacturer. The design must ensure that a voltage
exceeding the maximum rating is not applied to the resonator pin.
17.5.3
Notes on Board Design
When using the crystal resonator, place the crystal resonator and its load capacitors as close as
possible to the XTAL and EXTAL pins. Other signal lines should be routed away from the
oscillation circuit as shown in figure 17.6 to prevent induction from interfering with correct
oscillation.
Figure 17.6 Note on Board Design for Oscillation Circuit
Rev.2.00 Jun. 28, 2007 Page 560 of 666
REJ09B0311-0200
One cycle (worst case)
after the bus cycle completion
CPU
CPU
Operating clock
specified in SCKCR
Figure 17.5 Clock Modification Timing
Inhibited
Signal A Signal B
C
L2
C
L1
Operating clock changed
This LSI
XTAL
EXTAL
CPU