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Figure 17.7 shows the external circuitry recommended for the PLL circuit. Separate PLLVcc and
PLLVss from the other Vcc and Vss lines at the board power supply source, and be sure to insert
bypass capacitors CPB and CB close to the pins.
Figure 17.7 Recommended External Circuitry for PLL Circuit
PLLV
CC
PLLV
SS
V
CC
V
SS
Note: * CB and CPB are laminated ceramic capacitors.
Rp: 100 Ω
CPB: 0.1 µF *
CB: 0.1 µF *
Rev.2.00 Jun. 28, 2007 Page 561 of 666
Section 17 Clock Pulse Generator
REJ09B0311-0200
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