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Section 7 Data Transfer Controller (DTC)
7.5.7
Chain Transfer
Setting the CHNE bit in MRB to 1 enables a number of data transfers to be performed
consecutively in response to a single transfer request. Setting the CHNE and CHNS bits in MRB
set to 1 enables a chain transfer only when the transfer counter reaches 0. SAR, DAR, CRA, CRB,
MRA, and MRB, which define data transfers, can be set independently. Figure 7.10 shows the
chain transfer operation.
In the case of transfer with CHNE set to 1, an interrupt request to the CPU is not generated at the
end of the specified number of transfers or by setting the DISEL bit to 1, and the interrupt source
flag for the activation source and DTCER are not affected.
In repeat transfer mode, setting the RCHNE bit in DTCCR and the CHNE and CHNS bits in MRB
to 1 enables a chain transfer after transfer with transfer counter = 1 has been completed.
Vector table
DTC vector
address
Transfer information
start address
Rev.2.00 Jun. 28, 2007 Page 240 of 666
REJ09B0311-0200
Transfer information
stored in user area
Transfer information
Transfer information
Figure 7.10 Operation of Chain Transfer
CHNE = 1
CHNE = 0
Data area
Transfer source data (1)
Transfer destination data (1)
Transfer source data (2)
Transfer destination data (2)
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