Renesas H8SX/1650 Hardware Manual page 288

Section 8 I/O Ports
(2)
P26/PO6/TIOCA5/TMO1/TxD1
The pin function is switched as shown below according to the combination of the TPU, TMR,
SCI, and PPG register settings and P26DDR bit setting.
Module Name Pin Function TIOCA5_OE TMO1_OE
TPU TIOCA5 output 1
TMR TMO1 output
SCI TxD1 output
PPG PO6 output
I/O port P26 output
P26 input
(initial setting)
(3)
P25/PO5/TIOCA4/TMCI1/RxD1
The pin function is switched as shown below according to the combination of the TPU and PPG
register settings and P25DDR bit setting.
Module Name Pin Function
TPU TIOCA4 output
PPG PO5 output
I/O port P25 output
P25 input
(initial setting)
Rev.2.00 Jun. 28, 2007 Page 266 of 666
REJ09B0311-0200
TPU TMR

0 1
0 0
0 0
0 0
0 0
TPU
TIOCA4_OE
1
0
0
0
Setting
SCI PPG
TxD1_OE PO6_OE
 
 

1
0 1
0 0
0 0
Setting
PPG I/O Port
PO5_OE P25DDR
 

1
0 1
0 0
I/O Port
P26DDR




1
0