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Sleep mode ..................................... 564, 574
Smart card interface................................ 506
Software standby mode................... 564, 575
Space state .............................................. 481
Stack status after exception handling........ 82
Start bit ................................................... 481
State transitions......................................... 60
Stop bit.................................................... 481
Strobe assert/negate timing..................... 158
Synchronous clearing.............................. 352
Synchronous presetting........................... 352
System clock (Iφ)............................ 146, 553
T
Toggle output.......................................... 349
Trace exception handling.......................... 75
Transfer information............................... 228
Transfer information
read skip function ................................... 235
Transfer information writeback
skip function ........................................... 236
Transmit/receive data.............................. 481
Trap instruction exception handling.......... 79
V
Vector table address.................................. 70
Vector table address offset........................ 70
W
Wait control ............................................ 174
Watchdog timer (WDT) .......................... 437
Watchdog timer mode............................. 442
Write data buffer function....................... 211
Write data buffer function
for external data bus................................ 211
Write data buffer function
for peripheral modules ............................ 212
Rev.2.00 Jun. 28, 2007 Page 665 of 666
REJ09B0311-0200
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