8.1
Register Descriptions
Table 8.2 lists each port registers.
Table 8.2
Register Configuration in Each Port
Number of
Port
Pins
Port 1
8
Port 2
8
Port 3
8
Port 5
8
1
Port 6*
6
Port A
8
2
Port B*
4
Port D
8
Port E
8
Port F
8
Port H
8
Port I
8
[Legend]
O:
Register exists
:
No register exists
Notes: 1. The lower six bits are valid and the upper two bits are reserved. The write value should
always be the initial value.
2. The lower four bits are valid and the upper four bits are reserved. The write value
should always be the initial value.
DDR
DR
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
Registers
PORT
ICR
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
Rev.2.00 Jun. 28, 2007 Page 257 of 666
Section 8 I/O Ports
PCR
ODR
O
O
O
O
O
O
O
REJ09B0311-0200