Advanced Mode - Renesas H8SX/1650 Hardware Manual

Renesas 32-bit cisc microcomputer h8sx family / h8sx/1600 series
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Section 2 CPU
2.2.3

Advanced Mode

The data area in advanced mode is extended to 4 Gbytes as compared with that in middle mode.
• Address Space
A maximum address space of 4 Gbytes can be linearly accessed. For individual areas, up to 16
Mbytes of the program area and up to 4 Gbytes of the data area can be allocated.
• Extended Registers (En)
The extended registers (E0 to E7) can be used as 16-bit registers, or as the upper 16-bit
segments of 32-bit registers or address registers.
• Instruction Set
All instructions and addressing modes can be used.
• Exception Handling Vector Table and Memory Indirect Branch Addresses
In advanced mode, the top area starting at H'00000000 is allocated to the exception handling
vector table in 32-bit units. In each 32 bits, the upper eight bits are ignored and one branch
address is stored in the lower 24 bits. The structure of the exception handling vector table is
shown in figure 2.4.
H'00000000
H'00000001
H'00000002
H'00000003
H'00000004
H'00000005
H'00000006
H'00000007
Figure 2.4 Exception Handling Vector Table (Middle and Advanced Modes)
The memory indirect (@@aa:8) and extended memory indirect (@@vec:7) addressing modes are
used in the JMP and JSR instructions. An 8-bit absolute address included in the instruction code
specifies a memory location. Execution branches to the contents of the memory location.
In advanced mode, an operand is a 32-bit (longword) operand, providing a 32-bit branch address.
The upper eight bits are eserved and assumed to be H'00.
Rev.2.00 Jun. 28, 2007 Page 20 of 666
REJ09B0311-0200
Reserved
Reset exception vector
Reserved
Exception vector table

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