Table of Contents
Advertisement
2.6.2
Memory Data Formats
Figure 2.13 shows the data formats in memory.
The H8SX CPU can access word data and longword data that are stored at any addresses in
memory. When word data begin at an odd address or longword data begin at an address other than
a multiple of 4, a bus cycle is divided into two or more accesses. For example, when longword
data begins at an odd address, the bus cycle is divided into byte, word, and byte accesses. In this
case, these accesses are assumed to be individual bus cycles.
However, instructions to be fetched, word and longword data to be accessed during execution of
the stack manipulation, block transfer instructions, and MAC instruction should be located to even
addresses.
When the stack pointer (ER7) is used as an address register to access the stack, the operand size
should be word size or longword size.
Data Type
1-bit data
Byte data
Word data
Longword data
Address
Address L
Address L
Address 2M
Address 2M + 1
Address 2N
Address 2N + 1
Address 2N + 2
Address 2N + 3
Figure 2.13 Memory Data Formats
Data Format
7
7
6
5
4
3
MSB
MSB
MSB
Rev.2.00 Jun. 28, 2007 Page 31 of 666
Section 2 CPU
0
2
1
0
LSB
LSB
LSB
REJ09B0311-0200
Advertisement
Table of Contents
