Renesas H8SX/1650 Hardware Manual page 49

Renesas 32-bit cisc microcomputer h8sx family / h8sx/1600 series
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Bit
Bit Name
5
H
4
U
3
N
2
Z
1
V
0
C
Initial
Value
R/W
Undefined R/W
Undefined R/W
Undefined R/W
Undefined R/W
Undefined R/W
Undefined R/W
Description
Half-Carry Flag
When the ADD.B, ADDX.B, SUB.B, SUBX.B, CMP.B,
or NEG.B instruction is executed, this flag is set to 1 if
there is a carry or borrow at bit 3, and cleared to 0
otherwise. When the ADD.W, SUB.W, CMP.W, or
NEG.W instruction is executed, the H flag is set to 1 if
there is a carry or borrow at bit 11, and cleared to 0
otherwise. When the ADD.L, SUB.L, CMP.L, or NEG.L
instruction is executed, the H flag is set to 1 if there is a
carry or borrow at bit 27, and cleared to 0 otherwise.
User Bit
Can be written and read by software using the LDC,
STC, ANDC, ORC, and XORC instructions.
Negative Flag
Stores the value of the most significant bit (regarded as
sign bit) of data.
Zero Flag
Set to 1 to indicate zero data, and cleared to 0 to
indicate non-zero data.
Overflow Flag
Set to 1 when an arithmetic overflow occurs, and
cleared to 0 otherwise.
Carry Flag
Set to 1 when a carry occurs, and cleared to 0
otherwise. A carry flag indicates the following:
A carry by an add instruction
A borrow by a subtract instruction
A carry by a shift or rotate instruction
The carry flag is also used as a bit accumulator by bit
manipulation instructions.
Rev.2.00 Jun. 28, 2007 Page 27 of 666
Section 2 CPU
REJ09B0311-0200

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