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Exception Source
Reserved for system use
User area (open space)
External interrupt
IRQ0
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8
IRQ9
IRQ10
IRQ11
Reserved for system use
4
Internal interrupt*
Notes: 1. Lower 16 bits of the address.
2. Not available in this LSI.
3. A DMA address error is generated by the DTC.
4. For details of internal interrupt vectors, see section 5.5, Interrupt Exception Handling
Vector Table.
Vector Number
19
23
24
63
64
65
66
67
68
69
70
71
72
73
74
75
76
79
80
255
Section 4 Exception Handling
Vector Table Address Offset*
2
Normal Mode*
H'0026 to H'0027
H'002E to H'002F
H'0030 to H'0031
H'007E to H'007F
H'0080 to H'0081
H'0082 to H'0083
H'0084 to H'0085
H'0086 to H'0087
H'0088 to H'0089
H'008A to H'008B
H'008C to H'008D
H'008E to H'008F
H'0090 to H'0091
H'0092 to H'0093
H'0094 to H'0095
H'0096 to H'0097
H'0098 to H'0099
H'009E to H'009F
H'00A0 to H'00A1
H'01FE to H'01FF
Rev.2.00 Jun. 28, 2007 Page 71 of 666
1
2
Advanced, Middle*
,
2
Maximum*
Modes
H'004C to H'004F
H'005C to H'005F
H'0060 to H'0063
H'00FC to H'00FF
H'0100 to H'0103
H'0104 to H'0107
H'0108 to H'010B
H'010C to H'010F
H'0110 to H'0113
H'0114 to H'0117
H'0118 to H'011B
H'011C to H'011F
H'0120 to H'0123
H'0124 to H'0127
H'0128 to H'012B
H'012C to H'012F
H'0130 to H'0133
H'013C to H'013F
H'0140 to H'0143
H'03FC to H'03FF
REJ09B0311-0200
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