Renesas H8SX/1650 Hardware Manual page 290

Section 8 I/O Ports
(6)
P22 /PO2/TIOCC3/TMO0/TxD0/IRQ10-A
The pin function is switched as shown below according to the combination of the TPU, TMR,
SCI, and PPG register settings and P22DDR bit setting.
Module Name Pin Function TIOCC3_OE TMO0_OE
TPU TIOCC3
output
TMR TMO0 output
SCI TxD0 output
PPG PO2 output
I/O port P22 output
P22 input
(initial setting)
(7)
P21/PO1/TIOCA3/TMCI0/RxD0/IRQ9-A
The pin function is switched as shown below according to the combination of the TPU and PPG
register settings and P21DDR bit setting.
Module Name Pin Function
TPU TIOCA3 output
PPG PO1 output
I/O port P21 output
P21 input
(initial setting)
Rev.2.00 Jun. 28, 2007 Page 268 of 666
REJ09B0311-0200
TPU TMR

1
0 1
0 0
0 0
0 0
0 0
TPU
TIOCA3_OE
1
0
0
0
Setting
SCI PPG
TxD0_OE PO2_OE
 
 

1
0 1
0 0
0 0
Setting
PPG I/O Port
PO1_OE P21DDR
 

1
0 1
0 0
I/O Port
P22DDR




1
0