Transmit Shift Register (Tsr); Serial Mode Register (Smr) - Renesas H8SX/1650 Hardware Manual

13.3.4

Transmit Shift Register (TSR)

TSR is a shift register that transmits serial data. To perform serial data transmission, the SCI first
automatically transfers transmit data from TDR to TSR, and then sends the data to the TxD pin.
TSR cannot be directly accessed by the CPU.
13.3.5

Serial Mode Register (SMR)

SMR is used to set the SCI's serial transfer format and select the baud rate generator clock source.
Some bits in SMR have different functions in normal mode and smart card interface mode.
• When SMIF in SCMR = 0
Bit
7
Bit Name C/A
Initial Value
0
R/W R/W
• When SMIF in SCMR = 1
7
Bit
GM
Bit Name
0
Initial Value
R/W
R/W
Bit Functions in Normal Serial Communication Interface Mode (When SMIF in SCMR = 0):
Bit Bit Name
7 C/A
6 CHR
6 5
CHR PE
0 0
R/W R/W
6 5
BLK PE
0 0
R/W R/W
Initial
Value R/W Description
0 R/W Communication Mode
0: Asynchronous mode
1: Clocked synchronous mode
0 R/W Character Length (valid only in asynchronous mode)
0: Selects 8 bits as the data length.
1: Selects 7 bits as the data length. LSB-first is fixed
In clocked synchronous mode, a fixed data length of 8
bits is used.
Section 13 Serial Communication Interface (SCI)
4 3
O/E STOP
0 0
R/W R/W
4 3
O/E BCP1
0 0
R/W R/W
and the MSB (bit 7) in TDR is not transmitted in
transmission.
Rev.2.00 Jun. 28, 2007 Page 455 of 666
2 1
MP CKS1
0 0
R/W R/W
2 1
BCP0 CKS1
0 0
R/W R/W
REJ09B0311-0200
0
CKS0
0
R/W
0
CKS0
0
R/W