Port 3 - Renesas H8SX/1650 Hardware Manual

(8)
P20/PO0/TIOCA3/TIOCB3/TMRI0/SCK0/IRQ8-A
The pin function is switched as shown below according to the combination of the TPU, SCI, and
PPG register settings and P20DDR bit setting.
Module Name Pin Function
TPU TIOCB3 output
PPG PO0 output
SCI SCK0 output
I/O port P20 output
P20 input
(initial setting)
8.2.3

Port 3

(1)
P37/PO15/TIOCA2/TIOCB2/TCLKD-A
The pin function is switched as shown below according to the combination of the TPU and PPG
register settings and P37DDR bit setting.
Module Name Pin Function
TPU TIOCB2 output
PPG PO15 output
I/O port P37 output
P37 input
(initial setting)
TPU SCI
TIOCB3_OE SCK0_OE

1
0 1
0 0
0 0
0 0
TPU
TIOCB2_OE
1
0
0
0
Setting
PPG
PO0_OE


1
0
0
Setting
PPG I/O Port
PO15_OE P37DDR
 

1
0 1
0 0
Rev.2.00 Jun. 28, 2007 Page 269 of 666
Section 8 I/O Ports
I/O Port
P20DDR



1
0
REJ09B0311-0200