Renesas H8SX/1650 Hardware Manual page 360

Section 9 16-Bit Timer Pulse Unit (TPU)
Bit Bit Name
3 TGIED
2 TGIEC
1 TGIEB
0 TGIEA
Rev.2.00 Jun. 28, 2007 Page 338 of 666
REJ09B0311-0200
Initial
value R/W Description
0 R/W TGR Interrupt Enable D
Enables/disables interrupt requests (TGID) by the TGFD
bit when the TGFD bit in TSR is set to 1 in channels 0
and 3.
In channels 1, 2, 4, and 5, bit 3 is reserved. It is always
read as 0 and cannot be modified.
0: Interrupt requests (TGID) by TGFD bit disabled
1: Interrupt requests (TGID) by TGFD bit enabled
0 R/W TGR Interrupt Enable C
Enables/disables interrupt requests (TGIC) by the TGFC
bit when the TGFC bit in TSR is set to 1 in channels 0
and 3.
In channels 1, 2, 4, and 5, bit 2 is reserved. It is always
read as 0 and cannot be modified.
0: Interrupt requests (TGIC) by TGFC bit disabled
1: Interrupt requests (TGIC) by TGFC bit enabled
0 R/W TGR Interrupt Enable B
Enables/disables interrupt requests (TGIB) by the TGFB
bit when the TGFB bit in TSR is set to 1.
0: Interrupt requests (TGIB) by TGFB bit disabled
1: Interrupt requests (TGIB) by TGFB bit enabled
0 R/W TGR Interrupt Enable A
Enables/disables interrupt requests (TGIA) by the TGFA
bit when the TGFA bit in TSR is set to 1.
0: Interrupt requests (TGIA) by TGFA bit disabled
1: Interrupt requests (TGIA) by TGFA bit enabled