Data Direction Register (Pnddr) (N = 1 To 3, 6, A, B, D To F, H, And I) - Renesas H8SX/1650 Hardware Manual

Section 8 I/O Ports
8.1.1

Data Direction Register (PnDDR) (n = 1 to 3, 6, A, B, D to F, H, and I)

DDR is an 8-bit write-only register that specifies the port input or output for each bit. A read from
the DDR is invalid and DDR is always read as an undefined value.
When the general I/O port function is selected, the corresponding pin functions as an output port
by setting the corresponding DDR bit to 1; the corresponding pin functions as an input port by
clearing the corresponding DDR bit to 0.
The initial DDR values are shown in table 8.3.
Bit 7
Bit Name Pn7DDR
Initial Value 0
R/W W
Note: The lower six bits are valid and the upper two bits are reserved for port 6 registers.
The lower four bits are valid and the upper four bits are reserved for port B registers.
Table 8.3 Startup Mode and Initial Value
Port
Port A
Other ports
Rev.2.00 Jun. 28, 2007 Page 258 of 666
REJ09B0311-0200
6 5
Pn6DDR Pn5DDR
0 0
W W
Startup Mode
External Extended Mode
H'80
H'00
4 3
Pn4DDR Pn3DDR
0 0
W W
2 1
Pn2DDR Pn1DDR
0 0
W W
0
Pn0DDR
0
W