Renesas H8SX/1650 Hardware Manual page 375

Renesas 32-bit cisc microcomputer h8sx family / h8sx/1600 series
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(2)
Example of Synchronous Operation
Figure 9.11 shows an example of synchronous operation.
In this example, synchronous operation and PWM mode 1 have been designated for channels 0 to
2, TGRB_0 compare match has been set as the channel 0 counter clearing source, and
synchronous clearing has been set for the channel 1 and 2 counter clearing source.
Three-phase PWM waveforms are output from pins TIOCA0, TIOCA1, and TIOCA2. At this
time, synchronous presetting and synchronous clearing by TGRB_0 compare match are performed
for channel 0 to 2 TCNT counters, and the data set in TGRB_0 is used as the PWM cycle.
For details on PWM modes, see section 9.4.5, PWM Modes.
TCNT_0 to TCNT_2 values
TGRB_0
TGRB_1
TGRA_0
TGRB_2
TGRA_1
TGRA_2
H'0000
TIOCA_0
TIOCA_1
TIOCA_2
Synchronous clearing by TGRB_0 compare match
Figure 9.11 Example of Synchronous Operation
Section 9 16-Bit Timer Pulse Unit (TPU)
Rev.2.00 Jun. 28, 2007 Page 353 of 666
REJ09B0311-0200
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