External Trigger Input Timing; Interrupt Source - Renesas H8SX/1650 Hardware Manual

14.4.4

External Trigger Input Timing

A/D conversion can be externally triggered. When the TRGS1 and TRGS0 bits are set to B'11 in
ADCR, an external trigger is input from the ADTRG0 pin. A/D conversion starts when the ADST
bit in ADCSR is set to 1 on the falling edge of the ADTRG0 pin. Other operations, in both single
and scan modes, are the same as when the ADST bit has been set to 1 by software. Figure 14.5
shows the timing.
Pφ
ADTRG0
Internal
trigger signal
ADST
14.5

Interrupt Source

The A/D converter generates an A/D conversion end interrupt (ADI) at the end of A/D conversion.
Setting the ADIE bit to 1 when the ADF bit in ADCSR is set to 1 after A/D conversion is
completed enables ADI interrupt requests. The data transfer controller (DTC) can be activated by
an ADI interrupt. Having the converted data read by the DTC in response to an ADI interrupt
enables continuous conversion to be achieved without imposing a load on software.
Table 14.5 A/D Converter Interrupt Source
Name
ADI0
Figure 14.5 External Trigger Input Timing
Interrupt Source
A/D conversion end
A/D conversion
Interrupt Flag
ADF
Rev.2.00 Jun. 28, 2007 Page 537 of 666
Section 14 A/D Converter
DTC Activation
Possible
REJ09B0311-0200