Table of Contents
Advertisement
8.3.5
Port Function Control Register 6 (PFCR6)
PFCR6 selects the TPU clock input pin.
Bit
7
Bit Name
Initial Value
1
R/W
R/W
Bit
Bit Name
7
6
LHWROE
5
4
3
TCLKS
2 to 0
6
5
LHWROE
1
1
R/W
R/W
Initial
Value
R/W
Description
1
R/W
Reserved
This bit is always read as 1. The write value should
always be 1.
LHWR Output Enable
1
R/W
Enables/disables LHWR output (valid in external
extended mode).
0: Specifies pin PA4 as I/O port
1: Specifies pin PA4 as LHWR output pin
1
R/W
Reserved
This bit is always read as 1. The write value should
always be 1.
0
R
Reserved
This is a read-only bit and cannot be modified.
0
R/W
TPU External Clock Input Pin Select
Selects the TPU external clock input pins.
0: Specifies pins P32, P33, P35, and P37 as external
1: Specifies pins P14 to P17 as external clock inputs
All 0
R/W
Reserved
These bits are always read as 0. The write value should
always be 0.
4
3
TCLKS
0
0
R
R/W
clock inputs
Rev.2.00 Jun. 28, 2007 Page 297 of 666
Section 8 I/O Ports
2
1
0
0
R/W
R/W
REJ09B0311-0200
0
0
R/W
Advertisement
Table of Contents
