Renesas H8SX/1650 Hardware Manual page 488

Section 13 Serial Communication Interface (SCI)
Bit Bit Name
2 TEND
1 MPB
0 MPBT
Note: * Only 0 can be written, to clear the flag.
Bit Functions in Smart Card Interface Mode (When SMIF in SCMR = 1):
Bit Bit Name
7 TDRE
Rev.2.00 Jun. 28, 2007 Page 466 of 666
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Initial
Value R/W Description
1 R Transmit End
[Setting conditions]
•
•
[Clearing conditions]
•
•
0 R Multiprocessor Bit
Stores the multiprocessor bit value in the receive frame.
When the RE bit in SCR is cleared to 0 its previous
state is retained.
0 R/W Multiprocessor Bit Transfer
Sets the multiprocessor bit value to be added to the
transmit frame.
Initial
Value R/W Description
1 R/(W)* Transmit Data Register Empty
Indicates whether TDR contains transmit data.
[Setting conditions]
•
•
[Clearing conditions]
•
•
When the TE bit in SCR is 0
When TDRE = 1 at transmission of the last bit of a
transmit character
When 0 is written to TDRE after reading TDRE = 1
When a TXI interrupt request is issued allowing
DTC to write data to TDR
When the TE bit in SCR is 0
When data is transferred from TDR to TSR
When 0 is written to TDRE after reading TDRE = 1
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be
sure to read the flag after writing 0 to it.)
When a TXI interrupt request is issued allowing
DTC to write data to TDR