Open-Drain Control Register (Pnodr) (N = 2 And F); Output Buffer Control; Port 1 - Renesas H8SX/1650 Hardware Manual

Section 8 I/O Ports
8.1.6

Open-Drain Control Register (PnODR) (n = 2 and F)

ODR is an 8-bit readable/writable register that selects the open-drain output function.
If a bit in ODR is set to 1, the pin corresponding to that bit in ODR functions as an NMOS open-
drain output. If a bit in ODR is cleared to 0, the pin corresponding to that bit in ODR functions as
a CMOS output.
The initial value of ODR is H'00.
Bit 7
Bit Name Pn7ODR
Initial Value 0
R/W R/W
8.2

Output Buffer Control

This section describes the output priority of each pin.
The name of each peripheral module pin is followed by "_OE". This (for example: MIOCA4_OE)
indicates whether the output of the corresponding function is valid (1) or if another setting is
specified (0). Table 8.5 lists each port output signal's valid setting. For details on the
corresponding output signals, see the register description of each peripheral module. If the name
of each peripheral module pin is followed by A or B, the pin function can be modified by the port
function control register (PFCR). For details, see section 8.3, Port Function Controller.
8.2.1

Port 1

(1)
P17/IRQ7-A/TCLKD-B
The pin function is switched as shown below according to the P17DDR bit setting.
Module Name
I/O port
Rev.2.00 Jun. 28, 2007 Page 262 of 666
REJ09B0311-0200
6 5
Pn6ODR Pn5ODR
0 0
R/W R/W
Pin Function
P17 output
P17 input (initial setting) 0
4 3
Pn4ODR Pn3ODR
0 0
R/W R/W
Setting
I/O Port
P17DDR
1
2 1
Pn2ODR Pn1ODR
0 0
R/W R/W
0
Pn0ODR
0
R/W