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(4)
P24/PO4/TIOCA4/TIOCB4/TMRI1/SCK1
The pin function is switched as shown below according to the combination of the TPU, SCI, and
PPG register settings and P24DDR bit setting.
Module Name Pin Function
TPU
TIOCB4 output
SCI
SCK1 output
PPG
PO4 output
I/O port
P24 output
P24 input
(initial setting)
(5)
P23/PO3/TIOCC3/TIOCD3/IRQ11-A
The pin function is switched as shown below according to the combination of the TPU and PPG
register settings and P23DDR bit setting.
Module Name
Pin Function
TPU
TIOCD3 output
PPG
PO3 output
I/O port
P23 output
P23 input
(initial setting)
TPU
SCI
TIOCB4_OE
SCK1_OE
1
0
1
0
0
0
0
0
0
TPU
TIOCD3_OE
1
0
0
0
Setting
PPG
PO4_OE
1
0
0
Setting
PPG
I/O Port
PO3_OE
P23DDR
1
0
1
0
0
Rev.2.00 Jun. 28, 2007 Page 267 of 666
Section 8 I/O Ports
I/O Port
P24DDR
1
0
REJ09B0311-0200
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