Interrupt Exception Handling Vector Table - Renesas H8SX/1650 Hardware Manual

Renesas 32-bit cisc microcomputer h8sx family / h8sx/1600 series
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Section 5 Interrupt Controller
5.5

Interrupt Exception Handling Vector Table

Table 5.2 lists interrupt exception handling sources, vector address offsets, and interrupt priority.
In the default priority order, a lower vector number corresponds to a higher priority. When
interrupt control mode 2 is set, priority levels can be changed by setting the IPR contents. The
priority for interrupt sources allocated to the same level in IPR follows the default priority, that is,
they are fixed.
Table 5.2
Interrupt Sources, Vector Address Offsets, and Interrupt Priority
Classification Interrupt Source
External pin
NMI
IRQ0
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8
IRQ9
IRQ10
IRQ11
Reserved for system use
WDT
WOVI
Rev.2.00 Jun. 28, 2007 Page 102 of 666
REJ09B0311-0200
Vector
Vector
Address
Number
Offset*
7
H'001C
64
H'0100
65
H'0104
66
H'0108
67
H'010C
68
H'0110
69
H'0114
70
H'0118
71
H'011C
72
H'0120
73
H'0124
74
H'0128
75
H'012C
76
H'0130
77
H'0134
78
H'0138
79
H'013C
80
H'0140
81
H'0144
IPR
Priority
High
IPRA14 to IPRA12
IPRA10 to IPRA8
IPRA6 to IPRA4
IPRA2 to IPRA0
IPRB14 to IPRB12
IPRB10 to IPRB8
IPRB6 to IPRB4
IPRB2 to IPRB0
IPRC14 to IPRC12
IPRC10 to IPRC8
IPRC6 to IPRC4
IPRC2 to IPRC0
IPRE10 to IPRE8
Low
DTC
Activation
O
O
O
O
O
O
O
O
O
O
O
O

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