Renesas H8SX/1650 Hardware Manual page 221

Renesas 32-bit cisc microcomputer h8sx family / h8sx/1600 series
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Table 6.20 shows the correspondence between conditions 1 to 3 and number of idle cycles to be
inserted for each area. Table 6.21 shows the correspondence between the number of idle cycles to
be inserted specified by settings A and B, and number of cycles to be inserted.
Table 6.20 Number of Idle Cycle Insertion Selection in Each Area
Insertion Condition
Consecutive reads in different areas 1
Write after read
Read after write
[Legend]
A:
Number of idle cycle insertion A is selected.
B:
Number of idle cycle insertion B is selected.
Invalid: No idle cycle is inserted for the corresponding condition.
Table 6.21 Number of Idle Cycle Insertions
A
IDLCA1
IDLCA0
0
0
0
1
1
0
1
1
Bit Settings
IDLSn
n
Setting
0
1
0
0
1
2
0
1
Bit Settings
IDLCB1
0
0
1
1
Section 6 Bus Controller (BSC)
Area for Previous Access
IDLSELn
0
1
0
A
A
1
B
B
0
A
A
1
B
B
B
IDLCB0
Number of Cycles
0
0
1
1
2
0
3
1
4
Rev.2.00 Jun. 28, 2007 Page 199 of 666
2
3
4
5
6
7
Invalid
A
A
A
A
A
A
B
B
B
B
B
B
Invalid
A
A
A
A
A
A
B
B
B
B
B
B
Invalid
A
REJ09B0311-0200

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