Table of Contents
Advertisement
(7)
PA1/BACK/(RD/WR)
The pin function is switched as shown below according to the combination of bus controller
register, port function control register (PFCR), and the PA1DDR bit settings.
Module Name
Pin Function
BACK output
Bus controller
RD/WR output
I/O port
PA1 output
PA1 input
(initial setting)
(8)
PA0/BREQO/BS-A
The pin function is switched as shown below according to the combination of bus controller
register, port function control register (PFCR), and the PA0DDR bit settings.
Module Name
Pin Function
BS-A output
Bus controller
BREQO output
I/O port
PA0 output
PA0 input
(initial setting)
Bus Controller
Byte control
SRAM
BACK_OE
Selection
1
0
1
0
0
0
0
0
0
I/O Port
Bus Controller
BS-A_OE
BREQ_OE
1
0
1
0
0
0
0
Section 8 I/O Ports
Setting
I/O Port
(RD/WR)_OE PA1DDR
1
0
0
Setting
I/O Port
PA0DDR
1
0
Rev.2.00 Jun. 28, 2007 Page 279 of 666
REJ09B0311-0200
1
0
Advertisement
Table of Contents
