Write Data Buffer Function For Peripheral Modules - Renesas H8SX/1650 Hardware Manual

Section 6 Bus Controller (BSC)
6.13.2

Write Data Buffer Function for Peripheral Modules

This LSI has a write data buffer function for the peripheral module access. Using the write data
buffer function enables peripheral module writes and on-chip memory or external access to be
executed in parallel. The write data buffer function is made available by setting the PWDBE bit in
BCR2 to 1. As for the peripheral module register space in which the write data buffer function is
effective, see table 6.26 in section 6.12.
Figure 6.41 shows an example of the timing when the write data buffer function is used. When this
function is used, if an internal I/O register write continues for two cycles or longer and then there
is an on-chip RAM, or an external access, internal I/O register write only is performed in the first
two cycles. However, from the next cycle onward an internal memory or an external access and
internal I/O register write are executed in parallel rather than waiting until it ends.
Figure 6.41 Example of Timing when Peripheral Module
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Peripheral module write
Iφ
Internal
address bus
Pφ
Internal I/O
Peripheral module address
address bus
Internal I/O
data bus
Write Data Buffer Function is Used
On-chip
memory
read