Output Data Registers H, L (Podrh, Podrl) - Renesas H8SX/1650 Hardware Manual

Section 10 Programmable Pulse Generator (PPG)
10.3.2

Output Data Registers H, L (PODRH, PODRL)

PODRH and PODRL store output data for use in pulse output. A bit that has been set for pulse
output by NDER is read-only and cannot be modified.
• PODRH
7
Bit
POD15
Bit Name
Initial Value 0
R/W
R/W
• PODRL
7
Bit
POD7
Bit Name
0
Initial Value
R/W
R/W
• PODRH
Bit Bit Name
7 POD15
6 POD14
5 POD13
4 POD12
3 POD11
2 POD10
1 POD9
0 POD8
Rev.2.00 Jun. 28, 2007 Page 394 of 666
REJ09B0311-0200
6 5
POD14 POD13
0 0
R/W R/W
6 5
POD6 POD5
0 0
R/W R/W
Initial
Value R/W Description
0 R/W Output Data Register 15 to 8
0 R/W For bits which have been set to pulse output by NDERH,
the output trigger transfers NDRH values to this register
0 R/W
during PPG operation. While NDERH is set to 1, the CPU
0 R/W
cannot write to this register. While NDERH is cleared, the
initial output value of the pulse can be set.
0 R/W
0 R/W
0 R/W
0 R/W
4 3
POD12 POD11
0 0
R/W R/W
4 3
POD4 POD3
0 0
R/W R/W
2 1
POD10 POD9
0 0
R/W R/W
2 1
POD2 POD2
0 0
R/W R/W
0
POD8
0
R/W
0
POD0
0
R/W