Renesas H8SX/1650 Hardware Manual page 678

Main Revisions and Additions in this Edition
Item
Table 1.3 Pin Functions
Table 3.3 Pin Functions in Each
Operating Mode (Advanced Mode)
Figure 3.1 Address Map
(Advanced Mode)
Table 8.1 Port Functions
Rev.2.00 Jun. 28, 2007 Page 656 of 666
REJ09B0311-0200
Page Revision (See Manual for Details)
11 Modified
Classification
Bus control
67 Modified
Port
Port A PA7
PA6, PA4
PA2 to PA0
Port B PB3 to 1
PB0
68 Deleted
Notes: In the H8SX/1650, space from H'FFC000 to
H'FF6000 was specified as the external address
space.
In the H8SX/1650C, space from H'FF0000 to
H'FF6000 is specified as the access-prohibited
space.
* This area is specified as the external address
space by clearing the RAME bit in SYSCR to 0.
255, Modified
256
Port Bit
Port B 0
Port F 7
6
5
Pin Name
CS0
CS1
CS2-A/CS2-B
CS3
CS4-A/CS4-C
CS5-A/CS5-B/
CS5-C/CS5-D
CS6-A/CS6-B/
CS6-C/CS6-D
CS7-A/CS7-B/
CS7-C
Mode 4
P/C*
P/C*
P*/C
P*/C
P/C*
Function
I/O Input Output
CS0/CS4-A/CS5-B

PB0

PF7 A23/CS4-C/CS5-C/
CS6-C/CS7-C

PF6 A22/CS6-D

PF5 A21/CS5-D
Mode 5
P/C*
P/C*
P*/C
P*/C
P/C*