Input/Output Pins; Register Descriptions - Renesas H8SX/1650 Hardware Manual

5.2

Input/Output Pins

Table 5.1 shows the pin configuration of the interrupt controller.
Table 5.1 Pin Configuration
Name
NMI
IRQ11 to IRQ0
5.3

Register Descriptions

The interrupt controller has the following registers.
• Interrupt control register (INTCR)
• CPU priority control register (CPUPCR)
• Interrupt priority registers A to C, E to H, K, and L (IPRA to IPRC, IPRE to IPRH, IPRK, and
IPRL)
• IRQ enable register (IER)
• IRQ sense control registers H and L (ISCRH, ISCRL)
• IRQ status register (ISR)
• Software standby release IRQ enable register (SSIER)
I/O Function
Input Nonmaskable External Interrupt
Rising or falling edge can be selected.
Input Maskable External Interrupts
Rising, falling, or both edges, or level sensing, can be selected.
Section 5 Interrupt Controller
Rev.2.00 Jun. 28, 2007 Page 87 of 666
REJ09B0311-0200