Table of Contents
Advertisement
Section 2 CPU
H'00000000
H'00000001
H'00000002
H'00000003
H'00000004
H'00000005
H'00000006
H'00000007
Figure 2.6 Exception Handling Vector Table (Maximum Modes)
The memory indirect (@@aa:8) and extended memory indirect (@@vec:7) addressing modes are
used in the JMP and JSR instructions. An 8-bit absolute address included in the instruction code
specifies a memory location. Execution branches to the contents of the memory location.
In maximum mode, an operand is a 32-bit (longword) operand, providing a 32-bit branch address.
• Stack Structure
The stack structure of PC at a subroutine branch and that of PC and CCR at an exception
handling branch are shown in figure 2.7. The PC contents are saved or restored in 32-bit units.
The EXR contents are saved or restored regardless of whether or not EXR is in use.
SP
Rev.2.00 Jun. 28, 2007 Page 22 of 666
REJ09B0311-0200
Reset exception vector
PC
(32 bits)
(a) Subroutine Branch
Figure 2.7 Stack Structure in Maximum Mode
Exception vector table
SP
EXR
CCR
PC
(32 bits)
(b) Exception Handling
Advertisement
Table of Contents
