Table of Contents
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Section 1 Overview
1.5
Pin Functions
Table 1.3
Pin Functions
Classification
Pin Name
Power supply
V
CC
V
CL
V
SS
PLLV
PLLV
Clock
XTAL
EXTAL
Bφ
Operating mode
MD2 to MD0
control
RES
System control
STBY
EMLE
Address bus
A23 to A0
Data bus
D15 to D0
BREQ
Bus control
BREQO
Rev.2.00 Jun. 28, 2007 Page 10 of 666
REJ09B0311-0200
I/O
CC
SS
Input
Input
Output
Input
Input
Input
Input
Output
Input/
output
Input
Output
Description
Power supply pins. Connect them to the system power
supply.
Connect this pin to V
via a 0.1-uF capacitor (The capacitor
SS
should be placed close to the pin).
Ground pins. Connect them to the system power supply
(0 V).
Power supply pin for the PLL circuit.
Ground pin for the PLL circuit.
Pins for a crystal resonator. An external clock signal can be
input through the EXTAL pin. For an example of this
connection, see section 17, Clock Pulse Generator.
Outputs the system clock for external devices.
Pins for setting the operating mode. The signal levels on
these pins must not be changed during operation.
Reset signal input pin. This LSI enters the reset state when
this signal goes low.
This LSI enters hardware standby mode when this signal
goes low.
Input pin for the on-chip emulator enable signal. The signal
level should normally be fixed low.
Output pins for the address bits.
Input and output for the bidirectional data bus. These pins
also output addresses when accessing an address–data
multiplexed I/O interface space.
External bus-master modules assert this signal to request
the bus.
Internal bus-master modules assert this signal to request
access to the external space via the bus in the external bus
released state.
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