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Section 2 CPU
Table 2.15 Effective Address Calculation for Branch Instructions
No.
Addressing Mode and Instruction Format
Register indirect
1
op
r
Program-counter relative with 8-bit displacement
2
op
disp
Program-counter relative with 16-bit displacement
op
disp
3
Program-counter relative with index register
op
r
24-bit absolute address
4
op
32-bit absolute address
op
Memory indirect
5
op
aa
6
Extended memory indirect
op
vec
2.8.13
MOVA Instruction
The MOVA Instruction stores the effective address into the general register.
1. Obtains data in the addressing mode of No.2 in table 2.14.
2. By using this data as the index instead of the general register in row No.5 in table 14.2, the
effective address calculation is executed, and the outcome is stored in the general register. For
details, see the H8SX Family Software Manual.
Rev.2.00 Jun. 28, 2007 Page 58 of 666
REJ09B0311-0200
Effective Address Calculation
31
31
31
31
31
31
Contents of general register (RL, R, or ER)
31
Zero
31
extension
aa
31
aa
31
31
31
31
31
General register contents
PC contents
7
Sign extension
disp
PC contents
15
Sign extension
disp
Zero extension
PC contents
23
aa
aa
7
Zero extension
aa
Memory contents
7
Zero extension
1
vec
2 or 4
Memory contents
Effective Address (EA)
0
31
0
31
+
0
0
31
+
0
0
×
2
31
+
0
0
31
0
31
0
0
31
0
×
0
0
31
0
0
0
0
0
0
0
0
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