Register Descriptions; Bus Width Control Register (Abwcr) - Renesas H8SX/1650 Hardware Manual

Section 6 Bus Controller (BSC)
6.2

Register Descriptions

The bus controller has the following registers.

• Bus width control register (ABWCR)

• Access state control register (ASTCR)
• Wait control register A (WTCRA)
• Wait control register B (WTCRB)
• Read strobe timing control register (RDNCR)
• CS assertion period control register (CSACR)
• Idle control register (IDLCR)
• Bus control register 1 (BCR1)
• Bus control register 2 (BCR2)
• Endian control register (ENDIANCR)
• SRAM mode control register (SRAMCR)
• Burst ROM interface control register (BROMCR)
• Address/data multiplexed I/O control register (MPXCR)
6.2.1 Bus Width Control Register (ABWCR)
ABWCR specifies the data bus width for each area in the external address space.
Bit 15
Bit Name ABWH7
Initial Value 1
R/W R/W
Bit 7
Bit Name ABWL7
Initial Value 1
R/W R/W
Note: * Initial value at 16-bit bus initiation is H'FEFF, and that at 8-bit bus initiation is H'FFFF.
Rev.2.00 Jun. 28, 2007 Page 124 of 666
REJ09B0311-0200
14 13
ABWH6 ABWH5
1 1
R/W R/W
6 5
ABWL6 ABWL5
1 1
R/W R/W
12 11
ABWH4 ABWH3
1 1
R/W R/W
4 3
ABWL4 ABWL3
1 1
R/W R/W
10 9
ABWH2 ABWH1
1 1
R/W R/W
2 1
ABWL2 ABWL1
1 1
R/W R/W
8
ABWH0
1/0
R/W
0
ABWL0
1
R/W