Wait Control - Renesas H8SX/1650 Hardware Manual

Renesas 32-bit cisc microcomputer h8sx family / h8sx/1600 series
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Section 6 Bus Controller (BSC)
6.6.4

Wait Control

This LSI can extend the bus cycle by inserting wait cycles (Tw) when the external address space is
accessed. There are two ways of inserting wait cycles: program wait (Tpw) insertion and pin wait
(Ttw) insertion using the WAIT pin.
(1)
Program Wait Insertion
From 0 to 7 wait cycles can be inserted automatically between the T
access space, according to the settings in WTCRA and WTCRB.
(2)
Pin Wait Insertion
For 3-state access space, when the WAITE bit in BCR1 is set to 1 and the ICR bit for the
corresponding pin is set to 1, wait input by means of the WAIT pin is enabled. When the external
address space is accessed in this state, a program wait (Tw) is first inserted according to the
WTCRA and WTCRB settings. If the WAIT pin is low at the falling edge of Bφ in the last T2 or
Tpw cycle, another Ttw cycle is inserted until the WAIT pin is brought high. The pin wait
insertion is effective when the Tw cycles are inserted to seven cycles or more, or when the number
of Tw cycles to be inserted is changed according to the external devices. The WAITE bit is
common to all areas. For details on ICR, see section 8, I/O ports.
Figure 6.20 shows an example of wait cycle insertion timing. After a reset, the 3-state access is
specified, the program wait is inserted for seven cycles, and the WAIT input is disabled.
Rev.2.00 Jun. 28, 2007 Page 174 of 666
REJ09B0311-0200
state and T
state for 3-state
2
3

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