Renesas H8SX/1650 Hardware Manual page 87

Renesas 32-bit cisc microcomputer h8sx family / h8sx/1600 series
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Bit
Bit Name
10
9
EXPE
8
RAME
7 to 2
1
DTCMD
0
Notes: 1. For details, see section 2.3, Instruction Fetch.
2. The initial value depends on the startup mode.
In operating modes 4 and 5, which are external extended modes, EXPE = 1.
Initial
Value
R/W
0
R/W
2
R/W
Undefined*
1
R/W
All 0
R/W
1
R/W
1
R/W
Descriptions
Reserved
This bit is always read as 0. The write value should
always
be 0.
External Bus Mode Enable
Selects external bus mode. In external extended mode,
this bit is fixed at 1 and cannot be changed. In single-
chip mode, the initial value of this bit is 0, and can be
read from or written to.
When writing 0 to this bit after reading EXPE = 1, an
external bus cycle should not be executed.
The external bus cycle may be carried out in parallel
with the internal bus cycle depending on the setting of
the write data buffer function.
0: External bus disabled
1: External bus enabled
RAM Enable
Enables or disables the on-chip RAM. This bit is
initialized when the reset state is released. Do not write
0 during access to the on-chip RAM.
0: On-chip RAM disabled
1: On-chip RAM enabled
Reserved
These bits are always read as 0. The write value should
always be 0.
DTC Mode Select
Selects DTC operation mode.
0: DTC is in full-address mode
1: DTC is in short address mode
Reserved
This bit is always read as 1. The write value should
always
be 1.
Rev.2.00 Jun. 28, 2007 Page 65 of 666
Section 3 MCU Operating Modes
REJ09B0311-0200

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