Input/Output Pin; Register Descriptions; Timer Counter (Tcnt) - Renesas H8SX/1650 Hardware Manual

Section 12 Watchdog Timer (WDT)
12.2

Input/Output Pin

Table 12.1 shows the WDT pin configuration.
Table 12.1 Pin Configuration
Name
Watchdog timer overflow
12.3

Register Descriptions

The WDT has the following three registers. To prevent accidental overwriting, TCSR, TCNT, and
RSTCSR have to be written to in a method different from normal registers. For details, see section
12.6.1, Notes on Register Access.

• Timer counter (TCNT)

• Timer control/status register (TCSR)
• Reset control/status register (RSTCSR)
12.3.1 Timer Counter (TCNT)
TCNT is an 8-bit readable/writable up-counter. TCNT is initialized to H'00 when the TME bit in
TCSR is cleared to 0.
Bit 7
Bit Name
Initial Value 0
R/W R/W
Rev.2.00 Jun. 28, 2007 Page 438 of 666
REJ09B0311-0200
Symbol I/O
WDTOVF
Output
6 5
0 0
R/W R/W
Function
Outputs a counter overflow signal in
watchdog timer mode
4 3
0 0
R/W R/W
2 1
0 0
R/W R/W
0
0
R/W