Bus Configuration - Renesas H8SX/1650 Hardware Manual

6.3

Bus Configuration

Figure 6.4 shows the internal bus configuration of this LSI. The internal bus of this LSI consists of
the following three types.
• Internal system bus
A bus that connects the CPU, DTC, on-chip RAM, internal peripheral bus, and external access
bus.
• Internal peripheral bus
A bus that accesses registers in the bus controller and interrupt controller and registers of
peripheral modules such as SCI and timer.
• External access cycle
A bus that accesses external devices via the external bus interface.
I φ
synchronization
CPU
Write data
buffer
P φ
synchronization
On-chip
DTC
RAM
Internal system bus
Bus controller,
interrupt controller,
power-down controller
Internal peripheral bus
Peripheral
functions
Figure 6.4 Internal Bus Configuration
Section 6 Bus Controller (BSC)
External access bus
B φ
synchronization
External bus
interface
Rev.2.00 Jun. 28, 2007 Page 145 of 666
Write data
buffer
REJ09B0311-0200