19.3
Register States in Each Operating Mode
Register
Abbreviation
Reset
P1DDR
Initialized
P2DDR
Initialized
P3DDR
Initialized
P6DDR
Initialized
PADDR
Initialized
PBDDR
Initialized
PDDDR
Initialized
PEDDR
Initialized
PFDDR
Initialized
P1ICR
Initialized
P2ICR
Initialized
P3ICR
Initialized
P5ICR
Initialized
P6ICR
Initialized
PAICR
Initialized
PBICR
Initialized
PDICR
Initialized
PEICR
Initialized
PFICR
Initialized
PORTH
PORTI
PHDR
Initialized
PIDR
Initialized
PHDDR
Initialized
PIDDR
Initialized
PHICR
Initialized
PIICR
Initialized
Module
Sleep
Stop State
Mode
All-Module-
Software
Clock-Stop
Standby
Mode
Mode
Rev.2.00 Jun. 28, 2007 Page 607 of 666
Section 19 List of Registers
Hardware
Standby
Mode
Module
Initialized
I/O port
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
REJ09B0311-0200