Renesas H8SX/1650 Hardware Manual page 127

Classification Interrupt Source
SCI_0 ERI0
RXI0
TXI0
TEI0
SCI_1 ERI1
RXI1
TXI1
TEI1
SCI_2 ERI2
RXI2
TXI2
TEI2

Reserved for system use
SCI_4 ERI4
RXI4
TXI4
TEI4

Reserved for system use
Note: * Lower 16 bits of the start address in advanced, middle, and maximum modes.
Vector
Vector Address
Number Offset*
144 H'0240
145 H'0244
146 H'0248
147 H'024C
148 H'0250
149 H'0254
150 H'0258
151 H'025C
152 H'0260
153 H'0264
154 H'0268
155 H'026C
156 H'0270
157 H'0274
158 H'0278
159 H'027C
160 H'0280
161 H'0284
162 H'0288
163 H'028C
164 H'0290
| |
255 H'03FC
Section 5 Interrupt Controller
IPR Priority
IPRK6 to IPRK4 High
IPRK2 to IPRK0
IPRL14 to IPRL12

IPRL6 to IPRL4

Low
Rev.2.00 Jun. 28, 2007 Page 105 of 666
DTC
Activation

O
O


O
O


O
O






O
O


|

REJ09B0311-0200