Renesas H8SX/1650 Hardware Manual page 158

Section 6 Bus Controller (BSC)
Bit Bit Name

15
14 IDLS2
13 IDLS1
12 IDLS0
11 IDLCB1
10 IDLCB0
9 IDLCA1
8 IDLCA0
Rev.2.00 Jun. 28, 2007 Page 136 of 666
REJ09B0311-0200
Initial
Value R/W Description
1 R/W Reserved
This bit is always read as 1. The write value should
always be 1.
1 R/W Idle Cycle Insertion 2
Inserts an idle cycle between the bus cycles when the
external write cycle is followed by external read cycle.
0: No idle cycle is inserted
1: An idle cycle is inserted
1 R/W Idle Cycle Insertion 1
Inserts an idle cycle between the bus cycles when the
external read cycles of different areas continue.
0: No idle cycle is inserted
1: An idle cycle is inserted
1 R/W Idle Cycle Insertion 0
Inserts an idle cycle between the bus cycles when the
external read cycle is followed by external write cycle.
0: No idle cycle is inserted
1: An idle cycle is inserted
1 R/W Idle Cycle State Number Select B
1 R/W Specifies the number of idle cycles to be inserted for the
idle condition specified by IDLS1 and IDLS0.
00: No idle cycle is inserted
01: 2 idle cycles are inserted
00: 3 idle cycles are inserted
01: 4 idle cycles are inserted
1 R/W Idle Cycle State Number Select A
1 R/W Specifies the number of idle cycles to be inserted for the
idle condition specified by IDLS2 to IDLS0.
00: 1 idle cycle is inserted
01: 2 idle cycles are inserted
10: 3 idle cycles are inserted
11: 4 idle cycles are inserted