Interrupts After Reset; On-Chip Peripheral Functions After Reset Release - Renesas H8SX/1650 Hardware Manual

4.3.2

Interrupts after Reset

If an interrupt is accepted after a reset but before the stack pointer (SP) is initialized, the PC and
CCR will not be saved correctly, leading to a program crash. To prevent this, all interrupt requests,
including NMI, are disabled immediately after a reset. Since the first instruction of a program is
always executed immediately after the reset state ends, make sure that this instruction initializes
the stack pointer (example: MOV.L #xx: 32, SP).
4.3.3

On-Chip Peripheral Functions after Reset Release

After the reset state is released, MSTPCRA and MSTPCRB are initialized to H'0FFF and H'FFFF,
respectively, and all modules except the DTC enter module stop state.
Consequently, on-chip peripheral module registers cannot be read or written to. Register reading
and writing is enabled when module stop state is canceled.
Iφ
RES
Internal
address bus
Internal read
signal
Internal write
signal
Internal data
bus
(1) Reset exception handling vector address (when reset, (1) = H'000000)
(2) Start address (contents of reset exception handling vector address)
(3) Start address ((3) = (2))
(4) First instruction in the exception handling routine
Figure 4.1 Reset Sequence (On-chip ROM Enabled Advanced Mode)
Section 4 Exception Handling
First
Vector Internal instruction
fetch operation prefetch
(1) (3)
High
(2)
Rev.2.00 Jun. 28, 2007 Page 73 of 666
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